Modelling and synthezis of real-time control systems based on hardware timed Petri Nets

Abstract

This paper presents a synthesis method of real-time control systems based on direct mapping of Petri net model into Field Programmable Gate Array (FPGA) circuit. Synchronous timed Petri nets have been developed to specify and model the control system. Switching to hardware description of the system is achieved through Hard Timed Petri Nets (HTPN). Direct correspondence between the elements of the original specification and circuit components ensures that the behavioral properties and time constraints, under which activate the control system, will be respected.