SUDACEVSCHI, Viorica; ABABII, Victor; GUTULEAC, Emilian; NEGURA, Valentin
(Stefan cel Mare University of Suceava, Romania, 2010)
This paper describes the digital systems synthesis based on direct mapping of Petri nets model into FPGA circuit. A design flow that includes the specification of the system using Synchronous Petri Nets, verification of ...