A Hardware Implementation of Petri Nets Models

SUDACEVSCHI, Viorica; ABABII, Victor; NEGURA, Valentin

dc.contributor.author	SUDACEVSCHI, Viorica
dc.contributor.author	ABABII, Victor
dc.contributor.author	NEGURA, Valentin
dc.date.accessioned	2021-09-01T10:49:15Z
dc.date.available	2021-09-01T10:49:15Z
dc.date.issued	2006
dc.identifier.citation	SUDACEVSCHI, Viorica, ABABII, Victor, NEGURA, Valentin. A Hardware Implementation of Petri Nets Models. In: Development and application systems: proc. of 7th International Conference. 25 – 27 May 2006, Suceava, Romania. 2006, pp. 9-14.	en_US
dc.identifier.uri	http://repository.utm.md/handle/5014/16853
dc.description.abstract	In this work is proposed a hardware implementation method of Safe Petri Net model (SaPN). The processing structure presents an interaction between homogeny processing elements functional defined. On dependence of interconnections of elements, there can be implemented any complexity of Safe Petri Net model. The processing elements represent a flexible architecture, which permit to adjust them to Safe Petri Net model. Using this architecture and interactions of elements we obtained a reduced time of processing to checking Safe Petri Net to reachability, viability and other behavior properties.	en_US
dc.language.iso	en	en_US
dc.publisher	Stefan cel Mare University of Suceava, Romania	en_US
dc.rights	Attribution-NonCommercial-NoDerivs 3.0 United States	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/3.0/us/	*
dc.subject	Petri nets	en_US
dc.subject	processing	en_US
dc.title	A Hardware Implementation of Petri Nets Models	en_US
dc.type	Article	en_US