| dc.contributor.author | PLETEA, Ionica | |
| dc.contributor.author | ALECSANDRESCU, Iolanda | |
| dc.contributor.author | LUCANU, Nicolae | |
| dc.contributor.author | AGHION, Cristian | |
| dc.contributor.author | BARABAŞA, Constantin | |
| dc.contributor.author | ZBANCIOC, Marius | |
| dc.contributor.author | HAGAN, Marius | |
| dc.contributor.author | ŞONTEA, Victor | |
| dc.date.accessioned | 2026-02-18T19:04:55Z | |
| dc.date.available | 2026-02-18T19:04:55Z | |
| dc.date.issued | 2025 | |
| dc.identifier.citation | PLETEA, Ionica; Iolanda ALECSANDRESCU; Nicolae LUCANU; Cristian AGHION; Constantin BARABAŞA; Marius ZBANCIOC; Marius HAGAN and Victor ŞONTEA. Neural Grain implemented in monolithic 3D technology. In: 17th International Symposium on Signals, Circuits and Systems (ISSCS), Iasi, Romania, 17-18 July, 2025. Institute of Electrical and Electronics Engineers, 2025, pp. 1-4. ISBN 979-8-3315-5300-5, eISBN 979-8-3315-5299-2, ISSN 2995-0228, eISSN 2995-0236. | en_US |
| dc.identifier.isbn | 979-8-3315-5300-5 | |
| dc.identifier.isbn | 979-8-3315-5299-2 | |
| dc.identifier.issn | 2995-0228 | |
| dc.identifier.issn | 2995-0236 | |
| dc.identifier.uri | https://doi.org/10.1109/ISSCS66034.2025.11105656 | |
| dc.identifier.uri | https://repository.utm.md/handle/5014/35314 | |
| dc.description | Acces full text: https://doi.org/10.1109/ISSCS66034.2025.11105656 | en_US |
| dc.description.abstract | Neural Grain (NG) is a new concept that defines a computational architecture based on a scalable neural network, implemented in 3D topology. The paper presents the description of this concept and the implementation results in two technologies: HDL-FPGA and monolithic 3D. A 4×4×1 NG topology is considered, which represents a cubic structure of eight neurons + one output layer neuron. A 3D neural structure can represent a basic cell of a library belonging to a synthesis tool, allowing the modeling of intermodular and scalable computational architectures specific to neuromorphic architectures that imitate biological models. Neuromorphic architectures in 3D topology are dedicated to AI edge computing applications that require high computing power and low energy consumption. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Institute of Electrical and Electronics Engineers | en_US |
| dc.rights | Attribution-NonCommercial-NoDerivs 3.0 United States | * |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/us/ | * |
| dc.subject | solid modeling | en_US |
| dc.subject | neuromorphics | en_US |
| dc.subject | network topology | en_US |
| dc.subject | computational modeling | en_US |
| dc.subject | neurons | en_US |
| dc.subject | computer architecture | en_US |
| dc.subject | hardware | en_US |
| dc.subject | topology | en_US |
| dc.title | Neural Grain implemented in monolithic 3D technology | en_US |
| dc.type | Article | en_US |
The following license files are associated with this item: