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A new method of analysis and synthesis of asynchronous sequential circuits

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dc.contributor.author TIMIŞ, Mihai
dc.date.accessioned 2019-10-29T10:03:01Z
dc.date.available 2019-10-29T10:03:01Z
dc.date.issued 2005
dc.identifier.citation TIMIŞ, Mihai. A new method of analysis and synthesis of asynchronous sequential circuits. In: Microelectronics and Computer Science: proc. of the 4th intern. conf., September 15-17, 2005. Chişinău, 2005, vol. 2, pp. 124-128. ISBN 9975-66-038-X. en_US
dc.identifier.isbn 9975-66-038-X
dc.identifier.uri http://repository.utm.md/handle/5014/5548
dc.description.abstract In present paper, I propose a new method for analysis and synthesis of an asynchronous sequential system. The main idea consist on building a CK drive in signal, using the transition system function graph. It contains a clock signal who will drive on the states of the sequential system. To control sequential system, it is used a clock signal who contain a set of Master – Slave D latches circuits, logic gates. It was built from the sequential system transition matrix. All the system components are asynchronous, it has no clock signal. For system transitions control actions, it use a built in local clock signal who will drive in the digital system. Using the system fluence graph and fluence table will be build an asynchronous clock signal. It is implemented using logic gates like AND, OR, XOR. Using this method, the asynchronous sequential system can be easy implemented, and it works free of logic hazards. en_US
dc.language.iso en en_US
dc.publisher Technical University of Moldova en_US
dc.rights Attribution-NonCommercial-NoDerivs 3.0 United States *
dc.rights.uri http://creativecommons.org/licenses/by-nc-nd/3.0/us/ *
dc.subject asynchronous sequential circuits en_US
dc.subject sequential circuits en_US
dc.subject circuits en_US
dc.title A new method of analysis and synthesis of asynchronous sequential circuits en_US
dc.type Article en_US


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