Parallel encoding-decoding of matroid error-correcting codes

BODYAN, D. G.; BODYAN, G. C.

dc.contributor.author	BODYAN, D. G.
dc.contributor.author	BODYAN, G. C.
dc.date.accessioned	2024-07-02T06:30:16Z
dc.date.available	2024-07-02T06:30:16Z
dc.date.issued	2008
dc.identifier.citation	BODYAN, D. G., BODYAN, G. C. Parallel encoding-decoding of matroid error-correcting codes. In: The 18th International Crimean Conference - Microwave & Telecommunication Technology, 08-12 September 2008, Sevastopol, Ukraine, 2008, pp. 448-456. ISBN 978-966-335-166-7.	en_US
dc.identifier.isbn	978-966-335-166-7
dc.identifier.uri	https://doi.org/10.1109/CRMICO.2008.4676426
dc.identifier.uri	http://repository.utm.md/handle/5014/27729
dc.description	Acces full text - https://doi.org/10.1109/CRMICO.2008.4676426	en_US
dc.description.abstract	The algorithm of parallel encoding and decoding of the maximum distance separable matroid codes is proposed. The parity-check matrices with specific structures are applied for synthesis majority-logic circuits of locating and correcting errors. The parameterized VHDL-entities for implementation of the encoder and decoder are designed.	en_US
dc.language.iso	en	en_US
dc.publisher	Institute of Electrical and Electronics Engineers (IEEE)	en_US
dc.relation.ispartofseries	18th International Crimean Conference "Microwave & Telecommunication Technology";08-12 September 2008, Sevastopol, Ukraine
dc.rights	Attribution-NonCommercial-NoDerivs 3.0 United States	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/3.0/us/	*
dc.subject	matroid codes	en_US
dc.subject	parity-check matrices	en_US
dc.subject	encoders	en_US
dc.subject	decoders	en_US
dc.title	Parallel encoding-decoding of matroid error-correcting codes	en_US
dc.type	Article	en_US